ANALYSIS AND SIMULATION OF THREE PHASE TRAPEZOIDAL PWM FOR CASCADED MULTILEVEL INVERTER FAWWAZ AMIR BIN KAMARUDIN

i ii i ANALYSIS AND SIMULATION OF THREE PHASE TRAPEZOIDAL PWM FOR CASCADED MULTILEVEL INVERTER FAWWAZ AMIR BIN KAMARUDIN This report is submitt...
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ANALYSIS AND SIMULATION OF THREE PHASE TRAPEZOIDAL PWM FOR CASCADED MULTILEVEL INVERTER

FAWWAZ AMIR BIN KAMARUDIN

This report is submitted in partial fulfillment of the requirement for the award of a degree in Bachelor of Electrical Engineering

Faculty of Electrical Engineering Universiti Teknologi Malaysia

APRIL 2010

ii

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DEDICATION

To my beloved family for their enduring love, motivation and support.

iv

ACKNOWLEDGEMENT

In the name of Allah, the most Gracious, and the most Merciful.

Praise to Almighty Allah who gave me the courage and patience to carry out this work successfully. I would like to express my eternal gratitude and appreciation to my supervisor, Dr.Shahrin Bin Md. Ayob for his valuable guidance and encouragement throughout the completion of my project. Without his suggestion and support, this project would not have been the same presented here.

My sincere appreciation is also extended to my family for their emotional support. Thanks for their encouragement, love and fully supports that they had given to me.

Nevertheless, my great appreciation dedicated to all my friends especially Muhamad Hazrul Mustapha who helped and supported me along the way and those whom who involve directly or indirectly with this project. meaningful word than thank you so much.

There is no such

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ABSTRACT

Modular Structured Multilevel inverter (MSMI) has been recognized to be very popular especially in high power application. This work proposed a new switching strategy for a particular multilevel inverter, known as Cascaded Multilevel Inverter (CMI).

The proposed scheme is based on classical unipolar PWM

technique. This method uses multiple trapezoidal modulation waveforms with a single triangular carrier. Trapezoid application gives several advantages compared to Sinusoidal PWM (SPWM), in terms of easy and fast real-time waveform generation with higher fundamental output voltage. Thus, in this project the three-phase multilevel inverter system is applied to eliminate third harmonic magnitude which is quite high, when the frequency modulation, mf to be odd and multiple of three. By observing the output waveform, it can be seen that with odd frequency modulation, mf the shape of output line-to-line voltage waveform looks more sinusoidal. Simulation studies on the operation of the multilevel inverter are done using Matlab/Simulink software. Analysis on the performance of multilevel inverter is based on the fundamental voltage, output voltage waveform, output harmonic spectrum and total harmonic distortion (THD).

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ABSTRAK

Struktur penyonsang pelbagai aras (MSMI) diiktiraf amat sesuai digunakan dalam penukaran voltan tinggi dan kuasa tinggi DC ke AC. Tesis ini mencadangkan satu bentuk pemodulatan PWM untuk penyonsang pelbagai aras struktur bersiri (CMI). Bentuk pemodulatan ini adalah diasaskan daripada teknik pensuisan unipolar PWM. Teknik ini menggunakan beberapa isyarat pemodulat trapezoid dan satu isyarat segitiga pembawa.

Penggunaan isyarat trapezoid memberikan beberapa

kelebihan berbanding Sinusoid PWM (SPWM), diantaranya adalah penghasilan isyarat masa sebenar yang mudah dan memberikan nilai magnitud asas yang tinggi. Pprojek ini akan menggunakan sistem tiga fasa pelbagai aras untuk menghilangkan magnitud harmonik ketiga, apabila memilih modulasi frekuensi kepada nilai ganjil dan gandaan tiga. Dengan merujuk kepada gelombang keluaran, ia akan kelihatan bentuknya seperti sinusoid pada voltan garisan apabila modulasi frekuensi ialah ganjil. Kajian operasi simulasi penyonsang pelbagai aras dijalankan dengan menggunakan perisisan Matlab/Simulink. Analisis tentang prestasi penyonsang pelbagai aras merujuk kepada isyarat voltan keluaran, spectrum frekuensi dan jumlah herotan harmonik (THD).

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TABLE OF CONTENTS

CHAPTER

CHAPTER I

CONTENT

PAGE

TITLE PAGE

i

DECLARATION

ii

DEDICATION

iii

ACKNOWLEDGEMENTS

iv

ABSTRACT

v

ABSTRAK

vi

TABLE OF CONTENTS

vii

LIST OF TABLES

x

LIST OF FIGURES

xi

LIST OF ABBREVIATIONS

xiii

INTRODUCTION 1.1

Introduction

1

1.2

Objectives

2

1.3

Scope

3

1.4

Methodology

4

viii CHAPTER II

TOPOLOGY OF MULTILEVEL INVERTER AND MODULATION TECHNIQUE 2.1

Introduction

5

2.2

Diode Clamped Multilevel Inverter (DCMI)

6

2.3

Capacitor Clamp Multilevel Inverter (CCMI)

8

2.4

Cascaded Multilevel Inverter (CMI)

10

2.5

Comparison among the Three of

12

Multilevel Inverter

CHAPTER III

2.6

Sinusoidal Pulse Width Modulation (SPWM)

13

2.7

Trapezoidal Pulse Width Modulation (TPWM)

15

2.8

Summary

16

TRAPEZOIDAL PWM FOR CASCADED MULTILEVEL INVERTER 3.1

Introduction

17

3.2

The Proposed Modulating Scheme

18

3.3

Trapezoidal Reference Signal Harmonic

21

Content 3.4

Three-Phase MSMI Circuit Topology and Operation

23

ix CHAPTER IV

SIMULATION USING MATLAB/SIMULINK 4.1

Introduction

25

4.2

Setting Simulation Parameters

27

4.3

Development of TPWM

28

4.4

Development of Multilevel Inverter

32

for Three-Phase CMI

CHAPTER V

CHAPTER VI

SIMULATION RESULTS AND ANALYSIS 5.1

Introduction

36

5.2

Output Voltage Waveform

36

5.2.1 Output Phase Voltage Waveform

36

5.2.2 Output Line Voltage Waveform

37

5.3

Total Harmonic Distortion (THD)

38

5.4

Output Harmonic Spectrum

39

5.5

Discussion

43

CONCLUSION AND SUGGESTIONS 6.1

Conclusion

45

6.2

Suggestions

46

REFERENCES

47

APPENDICES

48

x

LIST OF TABLES

TABLE

2.1

TITLE

PAGE

Diode-clamped five level inverter voltage levels and their

7

switch states 2.2

Capacitor-clamped five level inverter voltage levels and

9

their switch states 2.3

Cascaded multilevel inverter with separate dc source five

12

level inverter voltage levels and their switch states 2.4

Comparison of power component requirements per phase

13

leg among three of multilevel inverter 4.1

Numerical values for variable parameters

27

xi

LIST OF FIGURES

FIGURE

TITLE

PAGE

1.1

Multilevel inverter system

3

1.2

Flow of project development

4

2.1

Five level diode-clamped inverter

6

2.2

Five level capacitor-clamped inverter

8

2.3

Five level of cascaded multilevel inverter

11

2.4

Principle of sinusoidal PWM for three phase inverter

14

2.5

Trapezoidal PWM of input and output waveforms

16

3.1

Trapezoidal modulation signals and single carrier signal

18

3.2

PWM technique for five level inverter

19

3.3

Characterization of the trapezoidal slope angle, α

20

3.4 (a)

Harmonics magnitude (1,3,9 and 15) with different slope

22

angles, α 3.4 (b)

Harmonics magnitude (5,7,11 and 15) with different

22

slope angles, α 3.5

Three phase wye connection of five level cascaded

24

inverter 4.1

Project flow chart

26

4.2

Trapezoidal PWM implemented using Matlab/Simulink

28

4.3

Source block parameter for trapezoidal

29

4.4

Source block parameter for triangular

29

4.5

Trapezoidal modulating signals and single triangular

30

carrier signal 4.6

PWM signals of V1(t) and V2(t)

31

4.7

Switching signals for mi = 0.8, mf = 39

32

xii 4.8

Module of multilevel inverter, phase shift is 0 degree

33

4.9

Module of multilevel inverter, phase shift is 120 degree

34

4.10

Module of multilevel inverter, phase shift is 240 degree

34

5.1

Output phase voltage waveform with mf = 39, mi = 0.8

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5.2

Output line voltage waveform for mf = 39, mi = 0.8

37

5.3

Voltage harmonic spectrum for mf = 39, mi = 0.4

39

5.4

Voltage harmonic spectrum for mf = 39, mi = 0.5

40

5.5

Voltage harmonic spectrum for mf = 39, mi = 0.6

40

5.6

Voltage harmonic spectrum for mf = 39, mi = 0.7

41

5.7

Voltage harmonic spectrum for mf = 39, mi = 0.8

41

5.8

Voltage harmonic spectrum for mf = 39, mi = 0.9

42

5.9

Voltage harmonic spectrum for mf = 39, mi = 1.0

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5.10

Graph of total harmonic distortion, THD versus

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modulation index, mi

xiii

LIST OF ABBREVIATIONS

MSMI

Modular Structure Multilevel Inverter

DCMI

Diode-Clamped Multilevel Inverter

IGBT

Insulated Gate Bipolar Transistor

CMI

Cascaded Multilevel Inverter

FCMI

Flying-Capacitor Multilevel Inverter

MATLAB

Matrix Laboratory

VSI

Voltage Source Inverter

NPC

Neutral-Point Clamped

PWM

Pulse Width Modulation

SHEPWM

Selective Harmonic Elimination Pulse Width Modulation

SPWM

Sinusoidal Pulse Width Modulation

TPWM

Trapezoidal Pulse Width Modulation

THD

Total Harmonic Distortion

AC

Alternating Current

DC

Direct Current

GUI

Graphical User Interface

xiv

LIST OF SYMBOLS

Ac

Amplitude of Carrier Signal

Am

Amplitude of Sinusoidal Modulation Signal

AN

Maximum Counter Value of Trapezoidal

c(t)

Carrier Signal

fc

Frequency of Carrier Signal

mi

Modulation Index

mf

Modulation Ratio

m1(t)

Trapezoidal Modulation Signal

m2(t)

Shifted Trapezoidal Modulation Signal

M

Number of Modules in CMI

N

Number of Inverter Output Level

fs

Reference Frequency

V1(t)

PWM signal Obtained from Intersection Between m1(t) and c(t)

V2(t)

PWM Signal Obtained from Intersection Between m2(t) and c(t)

fm

Frequency Modulation

α

Trapezoidal Slope Angle

1

CHAPTER I

INTRODUCTION

1.1

Introduction

Inverter is a usually used to convert DC source to AC source. The function of an inverter is to change a dc input voltage to a symmetrical ac output voltage of desired magnitude and frequency. The output voltage can be fixed or variable at a fixed or variable frequency. The output voltage waveform of ideal inverters should be sinusoidal. Nevertheless, the waveforms of practical inverters are non-sinusoidal and contain certain harmonics. For low and medium power applications, square wave or quasi square wave voltages may be acceptable, and for high power applications low distorted sinusoidal waveform are required [1].

Multilevel inverter technology has drawn tremendous interest in the power industry especially in the area of high-power medium-voltage energy control. Multilevel inverters include an array of power semiconductors and capacitor voltage sources, the output of which generate voltages with stepped waveforms [2].

2

The term multilevel starts with three-level inverter introduce by Nabae et al [1], [3], [4]. By increasing the number of levels in the inverter, the output voltages have more steps generating a staircase waveform, which has a reduced harmonic distortion. They have significant advantages over the conventional inverter because of the capability to reduce the undesirable harmonics in order to improve the performance and efficiency [5], [6].Supplementary, multilevel inverter able to handle high voltage with minimum voltage stress on the switching devices, have a low harmonic content in the output voltage, generate lower dv/dt, and have a lower common-mode voltage, which results in reduce stress on motor bearings in drive applications [7].

An early observable patent appeared in 1975, which the cascade inverter was the first defined with a format that connects separately dc-source full bridge cells. During manipulation of the cascade inverter, the diode-clamped multilevel inverter was derived with diodes blocking the sources. The diode-clamped inverter also known as neutral point clamped (NPC) inverter when it was first use in a three level inverter in which mid-voltage level was defined as neutral point [2]. In 1990s, a new patent multilevel inverter is produce which is capacitor-clamped multilevel inverters. It also called flying-capacitor inverter. The capacitor clamping need a large number of capacitors to clamped the voltage.

1.2

Objectives

The objectives in this project are:

i.

To apply Trapezoidal Pulse-Width Modulation technique to threephase multilevel inverter.

ii.

To simulate the three phase multilevel inverter topology by using MATLAB/Simulink.

iii.

To eliminate the third and more harmonics of three-phase multilevel inverter.

3

1.3

Scope

The main focus of this project is on the simulation of three phase multilevel inverter with separate DC sources. The inverter output will be controlled by the TPWM technique. In TPWM scheme uses multiple trapezoid modulating signal waveforms with a single triangular carrier. Figure 1.1 shows that the block diagrams of TPWM generator for multilevel inverter.

Trapezoidal Pulse-Width Modulation (TPWM) AC Voltage

Multilevel DC Voltage Inverter

Figure 1.1: Multilevel inverter system

Load

4

1.4

Methodology

To proceed this project, three method have been used which is, first, study on the basic concept and operation of multilevel inverter. Then, simulate on the three phase multilevel inverter employing TPWM technique. In the end, analysis and discussion base on simulation result will be discussed. Figure 1.2 shows the illustration in detail the flow of this project.

Study on the basic concept and operation of multilevel inverter

Simulation on three phase multilevel inverter employing TPWM technique

Analysis and discussion base on simulation result

Figure 1.2: Flow of project development

5

CHAPTER II

TOPOLOGY OF MULTILEVEL INVERTER AND MODULATION TECHNIQUE

2.1

Introduction

To convert from AC to DC requires inverter. Multilevel inverter including one array semiconductors capacitor power and voltage resources, output where generate voltage by step wave form. [8]. Three-level inverter which is began with period multilevel inverter are introduced by Nabae et al [8]. The attractive features of an MLI are it can produce output voltage with low distortion and also can produce smaller common-mode voltage. There are some advantages and disadvantages for the each type of MLI.

The most common multilevel inverter topology:

i.

Diode-clamped multilevel inverters (DCMI) / neutral-point clamped.

ii.

Capacitor-clamp multilevel inverters (CCMI) / flying capacitors.

iii.

Cascaded multilevel inverter.

6

2.2

Diode-Clamped Multilevel Inverter (DCMI)

The diode-clamped multilevel inverter (DCMI) is also can called as neutral point clamped. The voltage across each switching devices is clamped to the capacitor divider through the diode network. The DCMI has number of limitations even it provide a relatively simple structure. The switching action should not involve of change of more than one voltage level that show clamping action is indirect. The capacitors acts as a source or sink of energy that resulting in capacitor voltage unbalance when source sinking real power. The inner capacitors C2 and C3 need to discharge when inverter acts as real power source and overcharge when it acts as a sink [7].

Figure 2.1 shows the circuit of DCMI with five-level. Turning on one of the switches will exclude the other from being turn on for the four complementary switch pair that is defined. The four complementary pairs are (S1, S1‟), (S2,S2‟), (S3,S3‟), and (S4,S4‟). The voltage level and their corresponding switch states shown in Table 2.1.

S1

C1 D1

S2

C2

S3 DC

D1 '

D2

C3 S

D2 '

4

D3

C4

S1 '

D3 '

S2 '

S3 '

S 4'

Figure 2.1: Five level diode-clamped inverter

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Table 2.1: Diode-clamped five level inverter voltage levels and their switch states

Load

+E

+3E/4

+E/2

E/4

0

S1

1

0

0

0

0

S2

1

1

0

0

0

S3

1

1

1

0

0

S4

1

1

1

1

0

S1 ’

0

1

1

1

1

S2 ’

0

0

1

1

1

S3 ’

0

0

0

1

1

S4 ’

0

0

0

0

1

Voltage

For the diode-clamped inverter there are major advantages that can be summarized as the harmonic content is low enough to avoid the need for filters when the number of levels is high. Effect of all devices are switched at the fundamental frequency, it might make the inverter efficiency become high. Also the control method for this inverter is simple.

There are also major disadvantages for the diode-clamped inverter. Excessive clamping diodes are required when the number of levels is high. It is difficult to control the real power flow of the individual converter in multi-converter systems.

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2.3

Capacitor-Clamp Multilevel Inverters (CCMI) / Flying Capacitors.

The capacitor-clamped multilevel inverter (CCMI) has been called as flying capacitor inverter. The circuit has independent capacitors where the voltage on each capacitor differs from the next capacitor is shows in Figure 2.2.

S1

C4 S2

DC

C3 C4

C4

C4

C2

C3

C3

S3

C2

S4 C1 S1 '

S2 '

S3 '

S4 '

Figure 2.2: Five level capacitor-clamped inverter

In a capacitor-clamped inverter the voltage combination has more flexibility than diode-clamped. Figure 2.2 shows also phase-leg a output with respect to the natural point n, Van, can be synthesized by switches combination in Table 2.2.

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Table 2.2: Capacitor-clamped five level inverter voltage levels and their switch states

Load

+E

+3E/4

+E/2

E/4

0

S1

1

1

1

1

0

S2

1

1

1

0

0

S3

1

1

0

0

0

S4

1

0

0

0

0

S1 ’

0

1

1

1

1

S2 ’

0

0

1

1

1

S3 ’

0

0

0

1

1

S4 ’

0

0

0

0

1

Voltage

It is possible to balance the capacitor charge by make the proper selection of capacitor combinations. Large number of bulk capacitor to clamp the voltage required for the capacitor clamping that is similar to diode clamping. The voltage rating for each capacitor used the same as that of the main power switch, an N-level inverter will require a total of (N-1)×(N-2)/2 clamping capacitors per phase-leg in addition to (N-1) main dc-bus capacitors [2].

For the capacitor-clamped inverter there are major advantages that can be summarized as capabilities can be provide during power outages when have large amounts of storage capacitors. These inverters provide switch combination redundancy for balancing different voltage levels. The harmonic content is low enough to avoid the need for filters as same like the diode-clamp inverter with more levels. And also for both real and reactive power flow can be controlled.

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There are also major disadvantages for the capacitor-clamped inverter as an excessive number of storage capacitors is required when the number of levels is high. To package with the bulky power capacitors are more difficult and are more expensive too for the high-level inverters. For real power transmission the switching frequency and switching losses are high and it can be very complicated for the inverter control.

2.4

Cascaded Multilevel Inverter (CMI)

A cascaded multilevel inverter consists of a series of H-bridge (single-phase, full-bridge) inverter units. The general function of this multilevel inverter is to synthesize a desired voltage from several separate dc source (SDCS s), which may be obtained from batteries, fuel cells, or solar cells. When compare with other type of multilevel inverter, this topology require less number of component with no extra voltage balancing capacitor or clamping diode. The relationship between the number of H-bridge module (M) with number of levels (N) is directly proportional, that is mean the number of H-bridge module is depends on the number of levels required and can be written as:

𝑀=

𝑁−1 2

; 𝑁 𝑜𝑑𝑑

(2.1)

Three different voltage outputs can be generated for each module, which is +E, 0, and –E. Sum of the outputs voltage from each module is the total output voltage. A five level inverter would have an output level of +2E, +E, 0, -E, and-2E [3].

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The topology of cascaded multilevel inverter shows in Figure 2.3. It has eight diodes and eight switches. The sequence of switching operates and the output voltage shows at Table 2.3.

Figure 2.3: Five level of cascaded multilevel inverter

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Table 2.3: Cascaded multilevel inverter with separate dc source five level inverter voltage levels and their switch states

Load

+2E

+E

0

-E

-2E

S1a

1

1

1

0

0

S2a

0

0

1

1

1

S3a

1

0

0

1

1

S4a

1

1

0

0

0

S1b

1

1

1

0

0

S2b

0

1

1

0

1

S3b

0

0

0

1

1

S4b

1

0

0

1

0

Voltage

2.5

Comparison among the Three of Multilevel Inverters

The multilevel inverter unique structure allows them to reach voltages with low harmonic without the use of transformer or series-connected synchronizedswitching devices [3]. As the number of levels increases, the synthesized output waveform has more steps, which in turn results in decrement of harmonic distortion.

Three main types of transformer less multilevel inverter that have been proposed by researchers are the diode-clamped inverter, the capacitor-clamped inverter, and cascaded inverter. All three of them is proposed to be used in static var compensation, back-to-back high voltage intertie and adjustable speed drive [4]. The power component required in three main different multilevel inverter topologies to generate a same number of output level shows in Table 2.4.

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Table 2.4: Comparison of power component requirements per phase leg among three of multilevel inverter

Inverter Type

Diode-clamped

Capacitor-

Cascaded

clamped

Structure

(N-1) x 2

(N-1) x 2

(N-1) x 2

Main Diodes

(N-1) x 2

(N-1) x 2

(N-1) x 2

Clamping Diodes

(N-1) x 2

0

0

DC Bus Capacitor

(N-1)

(N-1)

(N-1) / 2

Balancing

0

(N-1) x (N-2) / 2

0

Main Switching Devices

Capacitors

From the table it is clearly tells that structure of cascaded inverter requires the least number of power components compared to others. Furthermore, it avoid voltage balancing problem faced in capacitor-clamped and diode-clamped inverter. Cascaded structure has extra benefit that is its circuit layout flexibility. This topology allows easier maintenance and provides a very convenient way to add redundancy into the system for the modular construction.

2.6

Sinusoidal Pulse-Width Modulation (SPWM)

The most common PWM approach is sinusoidal PWM. In this method a triangular wave is compared to a sinusoidal wave of the desired frequency and the relative levels of the two waves is used to control the switching of devices in each phase leg of the inverter.

14

In the most straight forward implementation, generation of the desired output voltage is achieved by comparing the desired reference waveform (modulating signal) with a high-frequency triangular „carrier‟ wave as depicted schematically in Figure 2.4. Depending on whether the signal voltage is larger or smaller than the carrier waveform, either the positive or negative dc bus voltage is applied at the output. Note that over the period of one triangle wave, the average voltage applied to the load is proportional to the amplitude of the signal (assumed constant) during this period.

Figure 2.4: Principle of sinusoidal PWM for three phase inverter

when va0 > vT T+ on; T- off; va0 = ½Vd

va0 < vT T- on; T+ off; va0 = -½Vd

The resulting chopped square waveform contains a replica of the desired waveform in its low frequency components, with the higher frequency components being at frequencies of a close to the carrier frequency. Notice that the root mean square value of the ac voltage waveform is still equal to the dc bus voltage, and hence the total harmonic distortion is not affected by the PWM process. The

15

harmonic components are merely shifted into the higher frequency range and are automatically filtered due to inductances in the ac system.

When the modulating signal is a sinusoid of amplitude Am, and the amplitude of the triangular carrier is Ac, the ratio m=Am/Ac is known as the modulation index. Note that controlling the modulation index there for controls the amplitude of the applied output voltage. With a sufficiently high carrier frequency, the high frequency components do not propagate significantly in the ac network (or load) due the presence of the inductive elements. However, a higher carrier frequency does result in a larger number of switching per cycle and hence in an increased power loss. Typically switching frequencies in the 2-15 kHz range are considered adequate for power systems applications. Also in three-phase systems it is advisable to use

𝑓𝑐 𝑓𝑚

=

3N; N is levels, so that all three waveforms are symmetric.

2.7

Trapezoidal Pulse-Width Modulation (TPWM)

The SPWM, which is most commonly used, suffers from drawbacks for example that is low fundamental output voltage. The other techniques that offer improved performance is trapezoidal Pulse-Width Modulation (TPWM).

The employment of trapezoidal modulation offers several advantages. It provides simple signal generation with minimal digital circuitry, avoidance of look-up tables that require large data bases. It also provides higher fundamental output voltage compared to SPWM. Figure 2.5 shows some example of the input and output waveforms of trapezoidal PWM. This method uses trapezoid modulating signal waveform with a single triangular carrier.

16

Figure 2.5: Trapezoidal PWM of input and output waveforms.

2.8

Summary

In this chapter, an overview of three main topologies of multilevel inverter namely Diode-Clamped Multilevel Inverter (DCMI), Capacitor-Clamped Multilevel Inverter (DCMI), and Cascaded Multilevel Inverter (CMI) have been described. Its advantageous and disadvantageous have been discussed. The decision on selecting which topologies to be used depends on the application and the features of their DC source. For separate DC source application, Cascaded Multilevel Inverter is the most favorable. Furthermore, it requires less component count and simple in circuit layout. Multilevel PWM techniques proposed by previous researchers are also discussed.

17

CHAPTER III

TRAPEZOIDAL PWM SCHEME FOR CASCADED MULTILEVEL INVERTER

3.1

Introduction

Trapezoidal wave is suitable for the modulating signal of the microcomputerbased pulse-width modulation (PWM) inverter for the use of motor drives because the switching patterns can be generated by means of on-line computation. The waveform is changed from rectangular to a triangular wave. This chapter is dedicated to describe the Trapezoidal PWM modulation scheme applied to the Cascaded Multilevel Inverter (CMI).

First in step, the fundamental idea of trapezoidal PWM is described. This scheme proposes a single carrier with multiple trapezoidal reference waveforms that in contrary to other methods suggested by previous researchers. A brief description on trapezoidal waveform itself and relationship between trapezoidal slope angle α, and its harmonics profile is described. This is critical because the harmonic performance is depends on the selection of trapezoidal slope angle. A MATLAB simulation applying the proposed switching technique on the CMI is carried out to

18

analyze the relationship between slope angle and its harmonics performance. Finally the simulation results for different slope angle is presented and discussed.

3.2

The Proposed Modulating Scheme

The proposed modulation scheme for CMI topology is actually based on the classical unipolar PWM switching. The main idea behind this method is to compare several trapezoidal modulation signals m(t) that have same amplitude (Am) and same frequency (fs) with a single triangular carrier signal c(t) that can be shown in Figure 3.1.

Figure 3.1: Trapezoidal modulation signals and single carrier signal

The number of modulation signals required is equal to the number of modules in CMI (M). The relationship between the number of output level (N) and M is described in Equation (3.1);

19

𝑀=

(𝑁−1) 2

(3.1)

Figure 3.2: PWM technique for 5-level inverter

For five levels CMI inverter as shown in Figure 3.2, two modules are needed, thus the trapezoidal signals are: 𝑚1 (𝑡) = 𝑚(𝛼, 2𝜋𝑓𝑚 𝑡)

(3.2)

𝑚2 𝑡 = 𝑚(𝛼, 2𝜋𝑓𝑚 𝑡)

(3.3)

The carrier signal is a train waveform with a frequency fc and amplitude Ac. The intersection between modulation signals and carrier defines the switching instant of the PWM pulses. The relationship of modulation index (mi) and modulation ratio (mf) for N-level inverter can be represented as:

20

𝐴𝑚

𝑚𝑖 = 𝑚𝑓 =

𝑀𝐴 𝑐 𝑓𝑐 𝑓𝑜

=

𝐴𝑚 (𝑁 −1) 𝐴𝑐 2

(3.4)

(3.5)

Where fc is the carrier frequency, while fm is the trapezoidal modulation signal. Therefore, if Ac defined at a fixed p.u (1 p.u), then mi ranges between 0 and 1, while Am ranges between 0 and M.

From Figure 3.3 that shows the characterization of the trapezoidal slope angle, α. As can be seen, the shape of the trapezoidal waveform varies with α. If α = 0°, the trapezoidal resemble a square wave, while if α = 90°, it will result in triangular wave. As a result for different values of α, different harmonics profile will be obtained.

Figure 3.3: Characterization of the trapezoidal slope angle, α

21

3.3

Trapezoidal Reference Signal Harmonic Content

The harmonic content of the trapezoidal reference signal, having an angle α between 0° and 90° as shown in Figure 3.3, can be found using a standard Fourier analysis. By assuming quarter-wave symmetry, only odd sine terms are present. Thus, the sine-term Fourier coefficient can be expresses as:

𝐴𝑛 =

𝜋 2 𝐹(𝜃) sin 𝜋 𝜃 =0 4

𝑛𝜃 𝑑𝜃

(3.6)

Where F(θ) represents trapezoidal signal : 1

𝐹 𝜃 =

𝛼

, 0° < 𝜃 < 𝛼

1, 𝛼 < 𝜃 < 90°

(3.7)

Equation (3.6) can be simplified down to general expression:

𝐴𝑛 =

4 𝑛2𝜋

×

sin (𝑛𝛼 ) 𝛼

(3.8)

The harmonics magnitude versus trapezoidal slope angle, α, are shown in Figure 3.4(a) and (b). From the figures, it can be observed that triangular shape (α = 90°) has less harmonics distortion than trapezoidal waveform. However trapezoidal waveform has a higher fundamental component compared to a triangular waveform that having the same peak. Thus, a trapezoidal waveform that has a harmonic distortion less than or equal to the triangular waveform is more desirable due to the higher fundamental magnitude [9].

22

Figure 3.4(a): Harmonics magnitude (1, 3, 9, and 15) with different slope angles, α

Figure 3.4(b): Harmonics magnitude (5, 7, 11, and 15) with different slope angles, α

23

3.4

Three Phase MSMI Circuit Topology and Operation

A general configuration of the MSMI has shown in Figure 3.5. Each module of the MSMI has the same structure where it consists of cascaded single-phase fullbridge inverter. The total output phase voltage is equal to the summation of the output voltage of the respective modules that are connected in series, which is close in form to a sinusoidal waveform. The number of DC input voltages required in this topology depends on the number of levels and the type of system. The number of modules (m) that is equal to the number of DC sources required depends on the number of levels (n) of the MSMI. For each phase, the number of modules m=(n1)/2. [10]

There are many advantages of using multilevel inverter such as the following:

i.

It is structure is simple and consists of fewer components.

ii.

Multilevel inverters can reach high voltage and reduce harmonics by their own structures without transformer.

iii.

It has the ability to reduce the voltage stress on each power device due to the utilization of multiple levels on the DC bus.

iv.

It is more suitable for high-voltage and high-power applications than the conventional inverters.

v.

It switches each device only once per line cycle, which generates a multi step staircase voltage waveform similar to a pure sinusoidal output voltage by increasing the number of levels.

vi.

Packaging layout is much easier, because of the simplicity of structure and lower component count [11].

24

As the name indicates the output phase voltage has five levels, which include +2VDC, +VDC, 0, -VDC, and -2VDC based on the Kirchoff‟s Voltage Law, the voltage for each phase can be calculated. This output depends on the topology of the operation of the switching. The number of modules required is two, based on the equation that gives the relationship between n and m.

Figure 3.5: Three-phase wye connection of 5 level cascaded inverter

25

CHAPTER IV

SIMULATION USING MATLAB/SIMULINK

4.1

Introduction

Matlab/Simulink is a software for modeling, simulating, and analyzing. It supports linear and nonlinear systems, modeled in continuous time, sampled time, or a hybrid. For modeling, Simulink provides a graphical user interface (GUI) for building models as block diagrams, using click and drag mouse operations. For simulation in this project, Matlab/Simulink has been used.

Figure 4.1 shows a flow chart which briefly offers simple steps that are followed in completing this project. Matlab/Simulink was utilized in this project to simulate three phase multilevel inverter. Finally, the results obtained from the simulation study are analyzed.

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Start

Learning Matlab/Simulink

Literature review

Design single phase inverter Expand single phase to three phase inverter Simulation and analysis Troubleshoot Verification

Achieved desired results?

End

Figure 4.1: Project flow chart

27

4.2

Setting Simulation Parameters

The MSMI is simulated by using Matlab/Simulink. To achieve the project goal in an efficient manner, simulation parameters were placed. By changing the stop time to 0.25 second, maximum simulation step size was selected to be 1 μseconds. The solver option was set at ode 23s (stiff/Mod.Rosebrock) solver. The parameters that are used in the proposed simulation system are listed in Table 4.1.

Table 4.1: Numerical values for variable parameters

Parameter

DC Source

Fundamental Frequency

Carrier Frequency

Modulation Index

Modulation Frequency

Symbol

E

fs

fc

mi

mf

Numerical Value

100V

50Hz

1950Hz

0.8

39

28

4.3

Development of TPWM

Basically, there are few ways to generate gating signals for each switch in the inverter. In this project, in order to get the required pattern of gating signal for the device, TPWM technique is used. The circuit of TPWM is implemented in Matlab/Simulink and is shown in Figure 4.2. In the circuit, the repeating sequence block is used to generate the single triangular carrier and multiple of trapezoid modulating signals. For this circuit, the two types of signals have their own desired values of frequency and amplitude in source block parameters as can be seen in Figure 4.3 and Figure 4.4.

At every instant the single triangular carrier is compared with the multiple trapezoid modulating signals and the comparison between them will produce the gating signal for each of the switches in the inverter. The complete circuit of combination of TPWM generator and multilevel inverter for single phase and three phase inverter are show at Appendix A and Appendix B.

Figure 4.2: Trapezoidal Pulse Width Modulation Implemented using Matlab/Simulink

29

Figure 4.3: Source block parameter for trapezoidal

Figure 4.4: Source block parameter for triangular

30

To produce five-level inverter with mi = 0.8, there are two modulation signals m1(t) and m2(t) are required. Signals m1 (t) is created by using repeating sequence function and signal m2(t) is created by a subtraction of signal m1(t) with the amplitude of carrier signal. For this project, amplitude of triangular carrier signal, Ac is fixed to 1 p.u, while for the trapezoidal modulating amplitude is 1.5 p.u.

Figure 4.5: Trapezoidal modulating signals and single triangular carrier signal

The PWM signals, V1(t) and V2 (t) are produced by comparing separately between trapezoid modulation signals with carrier signal. The output signals, V1 (t) and V2(t) are obtained after comparison and the result is shows in Figure 4.6. When Vtrapezoidal > Vtriangular = 1 for the first comparison between m1(t) with carrier signal. While for the second comparison between m2 (t) with carrier signal can be referred to Vtriangular > Vtrapezoidal = 1.

31

Figure 4.6: PWM signals of V1(t) and V2 (t)

The output voltage level of CMI is the summation of the output voltage of each module that connected in series. As mentioned before, the number of module depends on the number of output level that desired. For five level output voltage, which consisting +2E, +E, 0, -E, -2E, the number of modules needed is two. Figure 4.7 shows gate processing of Subsystem block to create gate signal for inverter which separately to 1st leg and 2nd leg of full bridge inverter.

32

Figure 4.7: Switching signals for mi = 0.8, mf = 39

4.4

Development of Multilevel Inverter for Three-Phase CMI

Cascaded multilevel inverter for three-phase has six module of full-bridge inverter, which is two module of full-bridge inverter that include of eight switches for each phase. In this project, Ideal Switch block was used to present switches device.

The input gating signal is come from TPWM generator and the connection port is connected to wye connection of the system. Figure 4.8 shows the circuit for one phase of the three-phase multilevel inverter. Terminator block is used in this project to cap blocks whose output ports are not connected to other blocks and avoids warning messages. The DC source value for each phase of module is 100V.

33

Figure 4.9 and Figure 4.10 show the topology of multilevel inverter for the next phase of module who has desired phase shift value for each phase. It contains of Transport Delay block that delay the input by a specified amount of time and it can be used to simulate a time delay. For this project, the time delay has been set to phase shift 120 degree for each phase. For the first module phase shift is 0 degree, the second module phase shift is 120 degree and lastly for the third module phase shift is 240 degree.

Figure 4.8: Module of multilevel inverter, phase shift is 0 degree

34

Figure 4.9: Module of multilevel inverter, phase shift is 120 degree

35

Figure 4.10: Module of multilevel inverter, phase shift is 240 degree

36

CHAPTER V

SIMULATION RESULTS AND ANALYSIS

5.1

Introduction

Simulation of three phase multilevel inverter had done by using Matlab/Simulink that used DC source voltage 100V. The output voltage fundamental frequency is fm = 50Hz. Analysis and comparison are done based on the results obtained from the fundamental of output voltage, output voltage waveforms, output voltage harmonic spectrums and Total Harmonic Distortion (THD).

5.2

Output Voltage Waveform

5.2.1 Output Phase Voltage Waveform

Figure 5.1 and Figure 5.2 show the output phase voltage and line voltage for three-phase multilevel inverter with mf = 39 and ma = 0.8.

37

Figure 5.1: Output phase voltage waveform with mf = 39, mi = 0.8

5.2.2 Output Line Voltage Waveform

Figure 5.2: Output line voltage waveform for mf = 39, mi = 0.8

38

For the output voltage waveforms, it is noticed that for odd mf, the waveforms are not symmetrical. It is also noticed from the result by comparing both output voltage waveforms that the output line voltage is much greater than the output phase voltage. Level for the output phase voltage is five levels while for the output line voltage is seven levels, which is more steps and the shape more to sinusoidal when referred to line to line voltage.

5.3

Total Harmonic Distortion (THD)

The total harmonic distortion (THD) is a ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency. It is used to indicate the quantity of harmonic contents in the output waveforms and described the quality of the output waveform and THD is typically as:

THD =

1 𝑉1

1 2 ∞ 2 𝑛 =2,3,.. 𝑉𝑛

× 100%

The THD analysis is carried out by using Powergui block and FFT Analysis function. Where n denotes the harmonic order and 1 is the fundamental quantity. For inverter application, THD represents how close the result waveform of ac output with a pure sinusoidal waveform. A good performance and high quality output should have low THD.

39

5.4

Output Harmonic Spectrum

Figure 5.3 to Figure 5.9 show the output harmonic spectrum for three-phase multilevel inverter. In this project, amplitude modulation frequency or modulation ratio, mf is fixed at 39, while nodulation index, mi is vary values from 0.4 to 1.0.

Figure 5.3: Voltage harmonic spectrum for mf = 39, mi = 0.4

40

Figure 5.4: Voltage harmonic spectrum for mf = 39, mi = 0.5

Figure 5.5: Voltage harmonic spectrum for mf = 39, mi = 0.6

41

Figure 5.6: Voltage harmonic spectrum for mf = 39, mi = 0.7

Figure 5.7: Voltage harmonic spectrum for mf = 39, mi = 0.8

42

Figure 5.8: Voltage harmonic spectrum for mf = 39, mi = 0.9

Figure 5.9: Voltage harmonic spectrum for mf = 39, mi = 1.0

43

5.5

Discussion

The overall results of the designed three-phase multilevel inverter have shown that the MSMI managed to compensate the distortion in the line-to-line voltage caused by the triplens effect. The PWM output waveform harmonic performance has been improved by eliminating more reference signal low-order harmonic content. For this result given, third harmonic magnitude which is considered quite high in the system has been eliminated when mf was chosen to be odd and multiple of three.

The harmonics are shifted to high frequency when the modulation index increased. The amplitude of each harmonic is influenced by the modulation index, whereby a better harmonic performance can be obtained when the modulation index, mi get closer to 1.0.

For this project, when mf is fixed to 39 and varies the value of modulation index, mi, the effect numbers of level is just same and not change. For the phase voltage output waveform remained to five levels while for the line-to-line output voltage waveform also remained to seven levels.

Figure 5.10 shows the relationship between total harmonic distortion and modulation index, mi. The value of modulation frequency, mf is fixed to 39. As the values of modulation index were increased, the value of THD of output waveform decreased. The decreasing value of THD means better output waveforms were produced in terms of more to sinusoidal shape and less harmonic distortion at the output voltage waveform.

44

THD versus mi Total Harmonic Distortion (%)

80 70 71.62

60 50 40

42.08

30

33.25

37.56

35.2 29.27

20

19.71

10 0 0.4

0.5

0.6

0.7

0.8

0.9

1

Modulation Index,Mi

Figure 5.10: Graph of total harmonic distortion, THD versus modulation index, mi

45

CHAPTER VI

CONCLUSION AND SUGGESTIONS

6.1

Conclusion

The performances of three-phase multilevel inverter have been analyzed. TPWM technique has been applied to this inverter and the control effects have been investigated. Two parameters are used to control the output voltage, which are the amplitude modulation index, mi and the frequency modulation, mf.

From the result, the three-phase multilevel inverter has two types of voltage there are phase voltage and line-to-line voltage waveforms. The shape of phase voltage waveform is five-levels while for the line-to-line voltage seven-levels which more to sinusoidal. The value of frequency modulation, mf was at fixed 39, the values of modulation index were varied. As the values of modulation index was increased closer to 1.0, the THD value decreased means that there is less distortion and have better performance at output voltage waveform.

46

For harmonic voltage spectrum of three-phase multilevel inverter had proved that the third and triplens harmonics were eliminated from the line-to-line output voltage, when the odd and multiple of three of frequency modulation, mf were applied in this project.

6.2

Suggestions

For the future works that can be considered are to design the three-phase multilevel inverter by using mathematical equation. And hardware implementation for the three-phase multilevel inverter system as an extension to the simulation project for verification purpose.

47

REFERENCES

[1]

Rodriguez J., Lai J. S. and Fang Z. P. (2002). “Multilevel Inverter: A Survey of Topologies, Controls and Applications.” IEEE transactions on Industrial Electronics, Vol. 49, No. 4, 724-738.

[2]

B. N. Chaudhari, B. G. Fernandes, (2000). “EPROM-Based Modulator for Synchronized Asymmetric Regular-Sampled SPWM Technique.” IEEE, 278-281

[3]

J. Aziz, Z. Salam (2003). “An Alternative PWM Scheme for Multilevel Voltage Source Inverter.” National Power and Energy Conference (PECon) 2003 Proceedings, 83-87.

[4]

Leon M. Tolbert, Thomas G. Habetler (1999). “Novel Multilevel Inverter Carrier-Based PWM Method.” IEEE Transactions on Industry Applications, Vol. 35, No. 5, 1098-1107.

[5]

V. G. Agelidis, D. M. Baker, W. B. Lawrance, C. V. Nayar (1997). “A Multilevel Inverter Topology for Photovoltaic Applications.” IEEE.

[6]

S. Mekhilef, A. Masaoud, (2006). “Xilinx FPGA Based Multilevel PWM Single Phase Inverter.” IEEE, 40-46.

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[7]

Grain P. Adam, Stephen J. F., Ahmed M. Massoud, W. W. Bary,(2008). “Capacitor Balance Issues of the Diode-Clamped Multilevel Inverter Operated in a Quasi Two-State Mode.” IEEE Transactions on Industrial Electronics, Vol.55, No.8,3088-3098.

[8]

J. S. Lai and F.Z. Peng,”Multilevel Converters-A New Breed of Power Converters,” IEEE Transactions on Industrial Electronics,Vol. 32, pp. 509517,1996

[9]

Ayob S.M and Salam.Z, (2004). “A New PWM Scheme For Cascaded Multilevel Inverter Using Multiple Trapezoidal Modulation Signals,” Department of Energy Conversion, Facultyof Electrical Engineering, Universiti Teknologi Malaysia, 81310 UTM Skudai, Johor Baharu.

[10]

Fang Zheng Peng, Jih-Sheng Lai, John McKeever and James Van Coevering “A multilevel Voltage-Source Inverter with Separate DC Sources for Static Var Generation”, 1995 IEEE 2541.

[11]

N. A. Azli and H.Mohd Yatim, “Modular Structured Multilevel Inverter for High Power AC Power Supply Applications”, Industrial Electronics, ISIE 2001. IEEE International Symposium on Volume: 2, 12-16 June 2001 Pages: 728-733.

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Appendix A

(i)

Schematic Block for Single Phase Multilevel Inverter

50

(a) Block diagram of Initializing Signal

(b) Block Diagram of Gate processing

51

(c) Block Diagram of Inverter

52

Appendix B

(ii)

Schematic Block of Three Phase Multilevel Inverter

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