A Unified Synchronization Solution for Ethernet ▪ Chandra Mallela ▪ SMTS – Systems Architecture ▪ Altera Corporation Santa Clara, CA

Objective ▪ Appreciate IEEE 1588 PTP (Precision Timing Protocol) as a unified synchronization solution

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Agenda ▪ Need for timing in Ethernet networks ▪ Overview of IEEE 1588 PTP (Precision Timing Protocol) and SyncE (Synchronous Ethernet) to fill in the need ▪ Current method of synchronization ▪ IEEE 1588 PTP capabilities ▪ IEEE 1588 PTP as unified synchronization solution Santa Clara, CA

Need for timing in Ethernet networks

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Ethernet networks ▪ Traditionally asynchronous • Lack of PRC (Primary Reference Clock) as in TDM networks (e.g. SONET), variable queuing delays due to arbitration and scheduling.

▪ Thus not suitable for timing applications • Ex: Internet of Things (IoT), Telecom networks, financial trading, gaming, Internet networks, electric power systems

▪ Perennial need to expand the Ethernet market☺ • Ethernet technology: cheaper & pervasive • Best bet to reduce capex and opex Santa Clara, CA

Overview of IEEE 1588 PTP and SyncE to fill in the need

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IEEE 1588 PTP ▪ IEEE 1588 PTP (Precision Timing Protocol) • Protocol designed to synchronize real-time clocks in the nodes of a distributed system that communicate using a network • Packet-oriented: Layer 2 and above • Provision for complete synchronization – ToD, phase and frequency synchronization

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SyncE ▪ SyncE (Synchronous Ethernet) • Operates at Layer 1 – physical layer • achieves frequency synchronization (syntonization) only • Better syntonization than with 1588

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Current method of synchronization

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PTP + SyncE ▪ Current method • PTP for ToD and Phase synchronization and SyncE for syntonization • SyncE operating at the physical layer - the best for syntonization

▪ Disadvantages of SyncE • Cascade of CDR’s – limited geographic applicability • Increased BoM cost – A separate jitter cleaner for SyncE Santa Clara, CA

IEEE 1588 PTP capabilities

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PTP – bird’s eye view

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A PTP system solution

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PTP OC master slave system

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Protocol at play OC#Master T1

OC#Slave Slave>data

Sync

Follow_up Delay_Req

T2

T1,>T2

T3

T1,>T2,>T3

T4 Delay_Resp T5

Sync T1,>T2,>T3,>T4 T6

MeanPathDelay(mpd)1=1((T25T1)+(T45T3))/2 ToD1Offset1=1T65T55mpd Frequency1offset1=1(Fo5 Fr)/Fr where1Fr1=11/(T55T1)1&1Fo1=11/(T65T2)

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Requirements at a glance ▪ “Lack of Effective Timing Signals Could Hamper ‘Internet of Things’ Development” • http://www.nist.gov/pml/div688/timing-031915.cfm

▪ Frequency accuracy at air interface: 50 PBB • GSM, WCDMA & CDMA2000

▪ Time accuracy: 3us to 10us • CDMA2000

▪ WCDMA TDD time accuracy: +/-1.25us of UTC Santa Clara, CA

Current notion ▪ ToD/Phase synchronization: PTP & Syntonization: SyncE ▪ Q: Should PTP be redundant for Syntonization? ▪ Not every application needs SyncE requirements • 400ps @1G, 50ps @10G

▪ A unified solution from PTP for both synchronization & syntonization • Cost-effective: reduced BoM, simplicity Santa Clara, CA

IEEE 1588 PTP as unified synchronization solution

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Time accuracy ▪ PTP most suitable for ToD & Phase correction • Just a few ns inaccuracy from HW

▪ Can meet stringent timing accuracy requirements ▪ Offset correction - less frequent

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Roadblocks for Syntonization ▪ Syntonization correction more often than phase & ToD correction ▪ Roadblocks at different levels • • • •

Network system Algorithm Protocol implementation System solution

▪ Next set of slides: Analyze the roadblocks to arrive at a checklist for effective syntonization Santa Clara, CA

Network System considerations ▪ Deterministic latency for PTP packets • Better managed networks – Higher priority QoS, possibly 1588 nodes all along – Symmetric path delay between PTP master and slave – Better traffic engineering, calibration

– Credit-based shaping for deterministic variation

▪ Sufficient throughput on links for better accuracy • 10Gbps Ethernet better than 1Gbps • 1Gbps better than 100/10Mbps • Half-Duplex : a No-No Santa Clara, CA

Contd… ▪ Minimum number of hops possible • Uncertainty accumulation caps the achievable syntonization

▪ High-quality GM (Grand Master) clock

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Algorithmic considerations ▪ Better filtering algorithm • Servo algorithm to consider right packets for its calculations – Drop packets spending ‘more time’ than ‘expected’ in the network – Choose fast packets for syntonization (small T2-T1, higher pps) – Longer averaging time (reduced average PDV – Packet Delay variation)

▪ Servo: usually PI (Proportional & Integral) control • Optimal Kp (proportional constant) & Ki (integral constant) combination • Requires field-testing Santa Clara, CA

Contd… ▪ Why not ‘D’ (Differential) in PID control? • If we can characterize the jitter & wander and incorporate in ToD corrections instantaneously

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Contd… ▪ High frequency of Sync packets • Higher estimation frequency of frequency correction • Higher resolution in frequency correction calculations – HW provides sub-nano frequency corrections!!

• Faster calculations to track syntonization closely

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Protocol considerations ▪ In-between TC devices support syntonization • Optional but required • Otherwise results in accumulated drift

▪ Optimal :Sync Vs {DelayReq, DelayResp} • Path delay is relatively static compared to syntonization – Higher sync than DelayReq/Resp packets

• Profile considerations – Telecom, networking, power, industrial

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Contd… ▪ 1-step instead of 2-step wherever possible • less PDV (Packet Delay Variation)

▪ Number of TCs vs BC • Results comparison between a TC and a BC replacing every TC with BC – not fair • Careful overall system consideration is critical!! – Is BC with syntonization better than TC without syntonization? – BC has no impact due to queuing!!

▪ Match the length of the packets!!! • Different lengths cause PDV, asymmetry errors

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System Solution considerations ▪ Support of 50 PPB over short-periods of 0.67ms, 1ms for WCDMA & LTE (Mobile Backhaul, Chapter 6, Wiley) • 50ppb for 1ms ~ 0.05ns adjustment in 1ms • Faster Algorithmic response, OS response and HW support • Stable local clock

▪ OS scheduling jitter • Leads to delayed response • Preferred scheduling for PTP packets

▪ Packet Parsing in HW for faster response from stack Santa Clara, CA

Contd… ▪ Driver interaction with HW • Ability to program ToD correction and frequency correction in one go without ‘multiple iterations’ • Different configurations for the flexible operation

▪ Collection of Timestamps by the stack • Simple & efficient • FIFO/DMA better than TCAM • Regular upstreaming (HW -> Stack) of timestamps

▪ Efficient loop between Servo & HW Santa Clara, CA

Contd… ▪ A servo algorithm that can be tuned to the HW capabilities • 16-b precision or even higher in HW

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Summary ▪ Analyzed the roadblocks for syntonization using the PTP ▪ Arrived at a checklist for effective syntonization from the perspectives of Network, Protocol, Algorithm and System ▪ Discussed the possibility of offering PTP as a unified synchronization solution • Cost-effective due to reduced BoM • Requires better on-path support for syntonization ▪ Systems-driven IEEE 1588 PTP solution from Altera corporation Santa Clara, CA

Acknowledgements ▪ Altera Corporation & Ethernet Technology Summit for giving me an opportunity ▪ Yu Ying Choo, Seng Kuan Yeow, Si Xing Saw & Vince Bridgers for improving my execution skills ▪ Jin Keat Lim & King Seng for the support to be on the right path ▪ David Mendel & Hoss Rahbar for making me understand my gaps Santa Clara, CA

Thank you☺

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