IEEE ISIE 2006, July 9-12, 2006, Montréal, Québec, Canada

A New Hybrid High Power Factor Three-Phase Unidirectional Rectifier Ricardo Luiz Alves, and Ivo Barbi, IEEE Senior Member Power Electronics Institute – INEP Department of Electrical Engineering Federal University of Santa Catarina – UFSC P. O. Box 5119 – Fax +55-48-234-5422 88040-970 Florianópolis, SC – BRAZIL E-mail: [email protected], [email protected] Abstract —This paper presents a new unidirectional hybrid three-phase rectifier composed by the parallel association of a single switch three-phase boost rectifier with a PWM three phase unidirectional rectifier. The objective to be reached is to reduce the harmonic content of input currents by processing a fraction of output active power with the PWM rectifier. The proposed structure allows to obtain a THD varying between 0 and 32%, just depending on the power processed by PWM three phase unidirectional rectifier. So, if the PWM rectifier is settled to process 45% of the total output power, the THD obtained is 0. Decreasing the PWM power to about 33% of the load power is possible to achieve the standards requirements. The rectifier topology conception, the principle of operation, control scheme and simulation results are also presented in this paper.

I.

INTRODUCTION

The concerns regarding restrictions introduced by governmental and international organizations in the harmonic content generated by the power converters, above all the framing in the standards IEEE 519 and IEC 61000-3-4, has been objective of many recently studies [1]. In the last decade, numerous topologies and modulation strategies have been introduced and studied extensively. In high power applications, three-phase rectifiers desirably requirement are; high efficiency, high reliability, simple control scheme and high quality input currents. Nevertheless, to obtain low THD (Total Harmonic Distortion) in high power converters can be quite a complex task. The capability of to dissipate the internal losses is the restriction factor of semiconductor element usage. This way, to medium and high power converters, forced-cooled heatsinks are frequently used. However, depending on the application area and the required operational behavior some switches can not be applied. The latest advances in highpower semiconductor devices have introduced newer solutions for high power conversion systems, however, the degree of acceptance of each technology vary in accordance with various industries and applications. Traditionally, three-phase AC-to-DC conversions are performed by diode or phase-controlled rectifiers. Due to the commutation of these structures to be done by the zero current crossing, they are also called "line-commutated"

1-4244-0497-5/06/$20.00 © 2006 IEEE

rectifiers. These rectifiers are extremely robust and present low cost, but draw non-sinusoidal currents or reactive power from the source, deteriorating the electrical power system quality. To compensate the harmonic distortion generated by the standard diode rectifiers, passive linear filters or power factor correction structures can be employed. The use of multi-pulse three-phase rectifiers allows to achieve a harmonic component cancellation by introduction of a phase-shifting generated by special winding connections in three-phase transformers. Moreover, the simplicity and reliability are preserved; however, they become heavy, bulky and expensive [2, 3, 5, 6]. Three-phase PWM rectifiers are widely employed in low and medium power drive applications where the requirements of the international standards should be satisfied. These structures are the most promising rectifier technology from a power quality viewpoint. A very low harmonic distortion and a unity power factor can be achieved. However, this structures are current not available for high power applications, specially due to unavailability of suitable costeffective power electronics devices. The development of softswitching strategies and the design of an optimal layout are the great challenges that must be overcome to introduce these topologies in high power applications. Recent trends in high-power rectifiers introduces new class of three-phase rectifiers; the Hybrid Rectifiers. The term “Hybrid Rectifier” denotes the series and/or parallel connection of a line-commuted rectifier and a self-commuted converter [4, 5]. Moreover, the line-commuted rectifier operates with low frequency and it handles the higher output power rating. Therefore, the active rectifier is designed to operate with small power ratings and with high switching frequency. Following these tendencies, this paper proposes a new hybrid high power rectifier with the characteristic of the power distribution, combining the robustness and the efficiency of the line-commuted rectifiers with the low harmonic current production of the self-commuted rectifiers. Notice that the hybrid rectifiers can not be classified as an active filter due to the fact that the self-commuted rectifier, in this case, processes active power while the active filters have the characteristic of processing only reactive energy.

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II. THE PROPOSED HYBRID RECTIFIER TOPOLOGY The single switch three-phase boost rectifier, presented in Fig. 1, is the basis of the proposed hybrid converter. This structure is settled due to present robustness, high efficiency and low complexity. Voltage and current in Phas

Kv

L

V1 (t) V1 (t)

i1 (t) Vref

V2 (t)

gate V3 (t)

i1 (t)

i2(t) S

C

R Gv(s)

i3(t)

THD = 32% Power Factor = 0.953 PWM

Gi(s)

Fig. 1 - Single Switch Three-Phase Boost Rectifier.

A rectangular shape is imposed to the input current waveforms, as can be observed in Fig. 2(a), for that reason, the power factor obtained is about 0.95. The control loop can impose only the amplitude of these currents, maintaining the output voltage constant under load variations. To obtain a sinusoidal waveform (Fig. 2(c)), an appropriated current wave shape (Fig. 2(b)), generated by an active PWM rectifier, should be added to each phase to compose the respective input current.

inappropriate current paths in the rectifier. From the original structure (Fig. 3 (a)), the boost inductance can be separated in two parts and a new boost diode can be added with no substantial modification on the converter operation (Fig. 3 (b)). Drawing the circuit in a different way, the circuit depicted in (Fig. 3 (c)) can be obtained. This procedure is important to a future easier visualization of the circuit. A traditional single-phase boost PFC is settled to generate the active current presented in Fig. 2(b). At first, a singlephase boost is added to phase 1, resulting in the circuit presented in (Fig. 3 (d)). The new hybrid rectifier depicted in (Fig. 3 (e)) can be obtained repeating this same procedure to phases 2 and 3. The neutral point can be disconnected without changes in the converter behavior. The proposed rectifier is obtained redrawing the circuit in a different way (Fig. 3(f)). III. MATHEMATICAL ANALYSIS To perform the mathematical analysis to the input current viewpoint, the output voltage is considered constant. Thus, the simplified circuit presented in Fig. 4 is adopted. Input voltages and input currents are supposed perfectly sinusoidal and expressed by (1). ⎧v1 ( t ) = Vp ⋅ sin ( ω⋅ t ) ⎪ ⎪ D ⎨v2 ( t ) = Vp ⋅ sin ( ω⋅ t −120 ) ⎪ D ⎩⎪v3 ( t ) = Vp ⋅ sin ( ω⋅ t +120 )

Graphical analysis Active current

Single Switch Boost current

(a)

Input current

Pin =3⋅

Fig. 2 – Current wave forms.

Nevertheless, the main objective is to process the higher output power rating with the single switch three-phase boost rectifier and, the remaining, with an active structure. The start point to generate the hybrid converter is the traditional single switch three-phase boost rectifier. However, some initial modifications are necessary to avoid

Where: Vp Ip Po Vo Io

Vp ⋅ Ip 2

(2)

= Po = Vo ⋅ Io

- Peak value of input voltage; - Peak value of input current; - Output power; - DC output voltage; - DC output current.

.

L

L/2

From the original structure, the boost inductance can be separated in two parts,

and a new boost diode can be added with no substantial modification on the converter behavior.

(f)

Then, mantaining the same circuit, but drawing in adiferent way.

(b)

(e)

Adding a tradictional single phase (c) boost PFC in phase 1 and conecting the output to the original structure filter capacitor

Extendig this procedure to phases 2 and 3.

Fig. 3 – Hybrid Three-Phase High Power Factor Rectifier conception.

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L/2

L/2

L/2

(a)

Redrawing the circuit in a diferent way, and disconecting the neutral point.

(1)

To simplify the analysis, the system is considered lossfree. This way, the input active power Pin can be expressed by (2).

(c)

(b)

and

⎧i1 ( t ) = Ip ⋅ sin ( ω⋅ t ) ⎪ ⎪ D ⎨i2 ( t ) = Ip ⋅ sin ( ω⋅ t −120 ) ⎪ D ⎩⎪i3 ( t ) = Ip ⋅ sin ( ω⋅ t + 120 )

(d)

ORIGINAL CIRCUIT

EQUIVALENT CIRCUIT Three-Phase Diode Bridge

Boost Converter iL (t)

iP1 (t)

i P1(t)

IL

i L(t)

iop (t)

iP2 (t)

i 1(t)

iP3 (t) V1 (t)

i1(t)

V2 (t)

i2(t)

V3 (t)

io(t) (passive)

(ative) i3(t) iA1 (t)

30°

+ Vo ioa (t)

iA3 (t)

Three-Phase PWM Rectifier

Fig. 4 – Simplified Hybrid Rectifier Block Diagram.

Therefore, substituting (2) in (1):

(3)

The mains currents are obtained by the sum of input currents of the passive rectifier (i1p(t), i2p(t) e i3p(t)) and the input currents of the active rectifier (i1a(t), i2a(t) e i3a(t)). This statement leads to (4). ⎧i1 ( t ) = ia1 ( t ) + ip1 ( t ) ⎪⎪ ⎨i2 ( t ) = ia2 ( t ) + ip2 ( t ) ⎪ ⎪⎩i3 ( t ) = ia3 ( t ) + ip3 ( t )

210°

Pop ⎧ 2 Po π ⎪ 3 ⋅ V ⋅ sin( ω t) − V ⋅ 3⋅ 3 p p ⎪ i A1 ( t ) = ⎨ ⎪ 2 ⋅ Po ⋅ sin( ω t) ⎪ ⎩ 3 Vp

270°

330°

if 30 D ≤ ω t ≤ 150 D

(8)

⎧⎪ 0 D ≤ ω t ≤ 30 o or if ⎨ D D ⎪⎩150 ≤ ω t ≤ 180

Due to unidirectional characteristic of PWM rectifier, the instantaneous input power should have only positive values. Analyzing (8), the solution that satisfies this condition is presented in (9):

(4)

Pop ≤

3 ⋅ Po ≈ 0.552 ⋅ Po π

(9)

Therefore, the active power rectifier operation limit is:

Where: ia1(t), ia2(t), ia3(t) - Active rectifier input currents; ip1(t), ip2(t), ip3(t) - Passive rectifier input currents. This way, substituting (3) in (4): ⎧ 2 P ⎪ia1 ( t ) = ⋅ o ⋅ sin(ωt) − ip1 ( t ) 3 Vp ⎪ ⎪ 2 Po ⎪ D ⎨ia2 ( t ) = ⋅ ⋅ sin(ωt −120 ) − ip2 ( t ) 3 Vp ⎪ ⎪ 2 P ⎪ia3 ( t ) = ⋅ o ⋅ sin(ωt + 120D ) − ip3 ( t ) 3 Vp ⎪⎩

150°

Where: - Boost inductor current; IL - Active power processed by the passive Pop rectifier. The power level processed by each rectifier is related with their respective input peak currents. According to the concept of hybrid rectifier, it is more interesting that the diode bridge rectifier processes the greatest part of the output power. Evidently, to obtain sinusoidal input currents, an optimal power distribution exists and should be discovered. Substituting (7) in (5) and analyzing the waveform of Fig. 5:

iA2 (t)

⎧ 2 Po ⎪i1 ( t ) = ⋅ ⋅ sin(ωt) 3 Vp ⎪ ⎪⎪ 2 Po D ⎨i2 ( t ) = ⋅ ⋅ sin(ωt −120 ) 3 V p ⎪ ⎪ 2 Po ⎪i3 ( t ) = ⋅ ⋅ sin(ωt +120D ) 3 Vp ⎪⎩

90°

Fig. 5. The relevant currents waveforms of the six-pulse diode bridge rectifier cascaded by Boost converter.

-

Poa ≥ (1 − 0.552 ) ⋅ Po ≈ 0.448 ⋅ Po

(10)

Where: Poa - Active power processed by the PWM rectifier.

Similarly, at the output, the load current is composed by the sum of the currents iop and ioa:

The expressions (9) and (10) are very important to define the active power sharing between the two converters. If this relation is not satisfied, the input currents will be distorted. However, it is possible to meet the standards requirements configuring the hybrid rectifier to operate in a such way that the active rectifier is responsible to handle only 33% of the rated power. In this case, the currents on the mains will present a small distortion, as depicted in Fig. 6, where the shaded areas denote the intervals were the relation is not satisfied.

io ( t ) = ioa ( t ) + iop ( t )

IV. CONTROL STRATEGY

(5)

(6)

Analyzing the passive rectifier current on phase 1, witch is depicted in Fig. 5, the relation (7) can be written: Pop π (7) ⋅ I = L

Vp 3 ⋅ 3

The control loop scheme of the hybrid rectifier is presented in Fig. 7. Four current control loops and a voltage control loop should be used. The DC output voltage regulation is provided by the voltage control loop. The signal obtained on the output of

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voltage controller is used to adjust the currents references in case of load variations. The Boost inductor current is sampled and compared with a constant reference. The error produced by this comparison is applied in the boost current compensator and the PWM modulator generates the gate signal to the boost switch. IL

Single switch three Phase Boost Rectifier

Voltage control loop

L

Vref

p1 +

Hv(s) Sum

L

1

L

-

L

2

3

C

R

o

o

i P1(t) L

p2

Active Rectifier

-

Sum

Hp(s)

PWM

Gate Mp

+ Mult

Iref

Ip

Boost current control loop

(a) SIX-PULSE DIODE BRIDGE INPUT CURRENT -

I p- I L

Ha1(s)

+

i A1(t)

PWM

Gate M1

PWM

Gate M2

PWM

Gate M3

Mult

sen(wt)

-

k2

Sum

k1

Sum

Ha2(s)

+ Mult sen(wt-120°)

-

Sum

Ha3(s)

+

V (t)

Ip

1

(b) PWM IDEAL INPUT CURRENT

V (t) 2

V (t) 3

sen(wt+120°)

Mult

PWM Current Control Loop

Fig. 7. Control loop.

i A1(t)

The presented results are obtained by using four proportional-integral controllers into currents and voltage control loops.

(c) PWM REAL INPUT CURRENT

V. SIMULATION RESULTS

Ip

The specifications used in simulation are presented in Table I. At fist, the operation mode selected was α = 0.55 and sinusoidal input currents are obtained. In a second simulation, α was settled to 0.68 to exemplify an operation mode where the condition established by (11) is not satisfied.

i 1(t)

(d) TOTAL INPUT CURRENT

Fig. 6. Currents on phase 1.

TABLE I

The currents ia1, ia2 e ia3 are indirectly controlled by sensing the mains currents and comparing with their respective sinusoidal references. These references signals must be synchronized with the mains voltages. A good practical way to obtain these signals is through synchronization transformers. The errors produced by the comparisons between the sampled signal and reference signal are applied in their respective compensators and the PWM modulators generate the gate signals to the active rectifier. The load sharing pre-established by (9) is guaranteed by the gains k1 and k2 that must be settled to satisfy the expression (11).

SPECIFICATIONS USED IN SIMULATION Description

0 ≤ α ≤ 0.552

where

α=

k2 k1

(11)

To obtain perfect sinusoidal currents it is extremely important that the gains ratio established by (11) has been adjusted quite close to 0.552, but never greater than this value. If the ratio is grater than 0.552, the imposed line currents will be distorted. Otherwise, if the ratio is close to 0, the active rectifier will assume the output rated power. The proposed control scheme can be implemented by analog commercial integrated circuits such as the UC3854 or by digital signal processors.

Variable

Value

Vp

Peak of line voltage

311V

Vin

RMS input voltage

220V

Vo

Output voltage

700V

Po

Output power

20kW

L p1 , L p 2

Single switch three phase boost inductor

2mH

L1 , L2 , L3

Active rectifier input inductors

2.5mH

Co

Output capacitor

4500µF

fs

Switching frequency

10kHz

The line voltages and the line currents for α = 0.55 are presented in Fig. 8. The power factor correction is achieved, due the sinusoidal line currents with low THD and the absence of displacement factor. The main current and the input currents on phase 1 of passive and active rectifiers are depicted in Fig. 9. The main currents present a sinusoidal shape as expected. It must be observed that the power processed by passive and active rectifiers (proportional to the amplitudes of the passive and the active input currents) is 55% and 45% of the total output power respectively.

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400V

50A

0A

0V

-50A 55ms

-400V

60ms

LINE VOLTAGES

65ms

70ms

75ms

75ms

80ms

85ms

90ms

95ms

100m

To verify the dynamic response of the system, a load variation was performed and presented in Fig. 12. Between 0ms and 50ms the converter operates with the half of the rated power. After this interval, the converter operates with full load through 50ms. In 100ms the converter operates with low load again. The output voltage transient is observed in Fig. 13. As previously mentioned, values greater than 0.55 for the ratio established by k1 and k2 will result in input currents distorted. In Fig. 14 the distortion in the line current of phase 1 generated by a 0.68 α can be observed. In the case presented in Fig. 14, the passive rectifier processes about 75% of the rated power while the active rectifier processes the remaining 25% of the output power (α was settled to 0.68). However, according to the Fig. 15, the line currents do not meet the harmonic content limit imposes by IEC 61000-3-4 standard. Thus, the relation between k1 and k2 must be set up to 0.55.

0A

60ms

70ms

Fig. 11. Output voltage transient response.

50A

-50A 55ms

65ms

80ms

85ms

90ms

95ms 100m

LINE CURRENTS

Fig. 8. Input voltages and input currents. 40A

0A

-40A

INPUT CURRENT OF THE PASSIVE RECTIFIER 40A

40A

0A

0A

-40A

INPUT CURRENT OF THE PWM RECTIFIER 50A -40A

INPUT CURRENT OF THE PWM RECTIFIER

40A

0A

0A

-50A 55ms

60ms

65ms

70ms

75ms

80ms

85ms

90ms

95ms

100m

LINE CURRENT -40A

Fig. 9. Currents on phase 1.

INPUT CURRENT OF THE PASSIVE RECTIFIER 50A

In Fig. 11 the same waveforms of Fig. 9 are plotted again, but at this time in the same plot. The total harmonic distortion observed in input currents is about 3.22%. In Fig. 10 the harmonic content of the input current and the limits imposed by the IEEE 61000-3-4 are depicted. As can be observed, all harmonic components are lower than their respective standard limit.

0A

-50A 0s

20ms

40ms

60ms

80ms

100ms

120ms

140ms

160m

LINE CURRENTS

Harmonic Content

Fig. 12. Load step response.

2.5 THD = 3.22% 2.0

720V

Hybrid Rectifier IEC 61000-3-4

1.5 1.0

700V 0.5 0 2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

Order (n)

680V

Fig. 10. Harmonic content of input current for α = 0.55.

0s

20ms

40ms

60ms

80ms

100ms

120ms

Fig. 13. Output voltage transient response.

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140ms

160ms

40A

0A

-40A INPUT CURRENTS OF THE PASSIVE RECTIFIER AND THE PWM RECTIFIER

50A

0

-50A 25ms

30ms

35ms LINE CURRENT

40ms

45ms

50ms

Fig. 14. Simulation results to k1 and k2 ratio equal to 0.68. Harmonic Content 5

THD = 9.04% Hybrid Retifier

4

IEC 61000-3-4 3 2 1 0 2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

Order (n)

Fig. 15. Harmonic content of input current α 0.68.

VI. THE ASSEMBLY OF THE PROTOTYPE A 20kW prototype of the proposed structure, presented in Fig. 16, was built using the components; Lp1 and Lp2 are 2.0mH/50A, La1, La2 and La3 are 2.5mH/15A; output capacitor are 4400µF composed by the association of 8x2200µF/450V; the IGBT´s Sa1, Sa2, Sa3 and Sb are SKM50GAL123D, the diodes are HFA30PB120. The control circuit board was implemented using four commercial analog integrated circuit UC3584B dedicated to power factor correction. At this moment, the prototype is operational with low load (about 6kW, as can be observed in experimental acquisition presented in white little box of Fig. 16). The full load operation results will be presented in the conference. VII. CONCLUSION

Fig. 16. Pictures of the prototype.

ACKNOWLEDGMENT The authors would like to thank CNPq (National Council of Scientific and Technological Development) for their contribution to this work in the form of a grant provided to Ricardo Luiz Alves. REFERENCES [1]

[2]

A novel three-phase hybrid rectifier to high power applications was proposed in this paper. The structure is composed by the parallel association of a passive and an active rectifier. The fact that each rectifier is responsible to process about 50% of the output power allows improving the robustness and providing a high efficiency of the power converter. The adopted control strategy allows the regulation of the output voltage and the control of the input currents to achieve high power factor. The increase of the component count by the use of two rectifier topologies does not affect strongly the volume, because the components are designed for the half of the output power. Moreover, all the magnetic elements are designed for high frequency operation.

[3]

[4]

[5]

[6]

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